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News Carnegie Mellon pledges to make chips smarter

Discussion in 'Article Discussion' started by Gareth Halfacree, 11 Oct 2013.

  1. Gareth Halfacree

    Gareth Halfacree WIIGII! Lover of bit-tech Administrator Super Moderator Moderator

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  2. Nexxo

    Nexxo * Prefab Sprout – The King of Rock 'n' Roll

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    "...and we'll call it Skynet!"
     
  3. Gareth Halfacree

    Gareth Halfacree WIIGII! Lover of bit-tech Administrator Super Moderator Moderator

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    No fate.
     
  4. Shirty

    Shirty W*nker! Super Moderator

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    Yep, another step toward sentient silicon.
     
  5. edzieba

    edzieba Virtual Realist

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    It's not that exiting. Think a more advanced version of out-of-order execution, able to optimise not just for fastest execution, but for using fewest chip subcomponents (allowing others to be switched off) to optimise for efficiency.
     
  6. schmidtbag

    schmidtbag What's a Dremel?

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    I'd rather them focus on improving the qualify of producing silicon transistors themselves than find ways to improve the efficiency of already existing chips. Or better yet, I'd rather them focus on the development of carbon-based transistors and finding more cost effective ways of producing them. I think silicon will always have its place in electronics (particularly because it is such a cheap and abundant resource) but personally, I think tweaking already produced silicon chips so they operate at peak efficiency is probably the least productive way to save energy. Besides, what could be considered the most efficient could still end up being very power consuming. For example, a laptop CPU might be more power efficient at 2.6GHz but will still use less power at 1.8GHz.
     
    Last edited: 11 Oct 2013
  7. Gareth Halfacree

    Gareth Halfacree WIIGII! Lover of bit-tech Administrator Super Moderator Moderator

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    Pardon?
    Not sure where you got "improve the efficiency of already existing chips" from, there, 'cos it ain't in the article. They're working on techniques for improving the efficiency of future chips.
     
  8. ch424

    ch424 Design Warrior

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    It basically sounds like they've taken the standard DVFS and clock/power gating controller and made it use some kind of machine learning to choose values rather than the algorithms/values set at manufacture time. This is what Intel does with turbo boost and SDP. I assume that Huawei did it for their K3V2 chip when they claimed it had an "AI Power Controller". I wouldn't be surprised if Qualcomm do the same thing with their "2.3GHz" snapdragon 800 chips too.
     

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