News NVIDIA to release integrated graphics chipset in Q3

[Tim S]

http://www.bit-tech.net/news/2005/05/10/nvidia_igp_q3/

[Bindibadgi]

At a guess, what are we looking at? 6200 core with a couple of pipes? Probably a revised process (0.11?) so you can passively cool it. So itll be a full DM9/SM3 part and "overtake" ATIs DX9 SM2.0b "x600 based" IGP.

I doubt many, if any manufacturers will take up the "onboard cache" option - none so far in the retail products have produced a board with the onboard memory option used for the RS480 part. Id love to compare the difference between using the cache option and not using it, to see if you actually get a playable experience with the TC/Hypermemory option used.

[Tim S]

There's no SM2.0b support on ATI's Radeon X600.

X600 and X300 are basically the same product - the cores use different manufacturing processes. Also, GeForce 6200 TurboCache, and GeForce 6200 are produced on a 0.11 micron manufacturing process.

I'd imagine something that will perform around the same levels of ATI's RS400 chipset.

[Bindibadgi]

? The x600/x300 are R3xx generation products which means they are SM2.0x capable, no?

[Tim S]

Originally Posted by Bindibadgi

? The x600/x300 are R3xx generation products which means they are SM2.0x capable, no?

They're only SM2.0 capable, not SM2.0b - the only products that support SM2.0b are X700 and higher.

[Bindibadgi]

Oo, what does the "b" have over non-b? extra instructions?

Every days a school day.

[Tim S]

Maximum SM3.0 instruction length: 65536 instructions
Maximum SM2.0b instruction length: 1536 instructions
Maximum SM2.0 instruction length: 352 instructions

They're combined vertex shader, texture and pixel shader instructions.

Basically it means you can compile longer, more efficient shaders.