News Elpida unveils ReRAM prototype

[brumgrunt]

Memory giant Elpida has confirmed the creation of a resistive RAM (ReRAM) prototype module.

http://www.bit-tech.net/news/hardwar...am-prototype/1

[Woody59]

So if ReRam replaced DRam, we could potentially leave our computers in sleep mode and not worry bout the electric bill! Every little helps!

[Gareth Halfacree]

Originally Posted by Woody59

So if ReRam replaced DRam, we could potentially leave our computers in sleep mode and not worry bout the electric bill! Every little helps!

If ReRAM (or racetrack memory, or any of the other 'universal memory' technologies) replaced DRAM, there would be no distinction between 'sleep mode,' 'hibernation' and 'off.' You press the power button, and your PC comes on *instantly,* with everything precisely where you left it. Swapping batteries on a laptop? No problem. Power cut? Wait for the power to come back and everything's still running.

Sadly, the technology is a fair way away from that level of performance and affordability... Still, it's a nice thought for the future.

[mclean007]

Originally Posted by Gareth Halfacree

Swapping batteries on a laptop? No problem. Power cut? Wait for the power to come back and everything's still running.

Not quite - a sudden power outage would still cause the CPU to lose its state, so power on wouldn't be exactly as you'd left it. And of course you might still get data corruption on SSDs/HDDs that were in the middle of a write cycle when power was lost. But if the PSU detected the power outage at the socket and was able to inform the hardware to be ready for outage, the CPU could dump its state into (non-volatile) RAM and the disk controller could probably cleanly abort any write transactions in the fraction of a second of power you'd get from the PSU's capacitors before the power outage at the socket reached the system.

[azazel1024]

I think you would also want some new mode/option that force purges the memory. A bit less for privacy reasons than anything. However, especially in yesteryear, and frankly still occasionally I run in to issues where simply rebooting a computer doesn't solve the issue, I need to physically shut it down and allow the RAM to lose its state by having it powered off for a few seconds before booting back up. Maybe just making BIOS/UEFI intelligent so that when a reboot is done, instead of reloading everything in to memory, it first zeros out the memory address space before starting to load everything in to memory again. That is, if you are using ReRAM for main memory, and not just super fast physical storage.

I can see how ReRAM could be pretty useful, especially in embedded markets such as routers where you could cut out a chip, maybe some complexity and have extremely fast storage, so a lot of operations like restarting a router are near instantaneous as you are using the same general pool for main memory and storage of the OS. I could also see how it could benifit things like tablets and phones with a lower power standby mode, lower idle power (if nothing is being actively written to the memory, no idle memory power consumption instead of, I guess, needing to keep the main memory in a higher power state than "self refresh") and much faster boot up if you can just save the state in main memory, which wouldn't purge on "shutting down".

[tad2008]

To be honest I am surprised that this kind of memory has not become a part of CPU's, SSD's and the Combo SSD/HDD's as not only would this save some power when the PC is on if a power cut happens no data should be lost and the current state would remain, instant on would certainly be better achieved.

[Xlog]

Why this won't replace RAM: it still has limited amount of write cycles.

[The Infamous Mr D]

Originally Posted by Xlog

Why this won't replace RAM: it still has limited amount of write cycles.

With storage that has the same throughput performance as DRAM, why would you want to replace it...?

[fluxtatic]

Originally Posted by tad2008

To be honest I am surprised that this kind of memory has not become a part of CPU's, SSD's and the Combo SSD/HDD's as not only would this save some power when the PC is on if a power cut happens no data should be lost and the current state would remain, instant on would certainly be better achieved.

It may be at some point, but as they said, it hasn't been commercialized yet. I don't think it will replace RAM, but I could see one or both of these happening: 1) it's used mainly in smartphones/tablets, etc, as replacement or augmentation of current storage, RAM and storage. However, it won't be marketed as such, just whatever BS name the manufacturers come up with, and so you might not even realize it's in the wild. 2) augmentation of current PC RAM/storage, where it's been given an equally silly name as in (1), but it's also pushed as ReRAM, as that will give nerds boners.

Obviously not both can be entirely true at the same time (not knowing it's out vs nerd boners, for example), but I think it's inevitable.

[azazel1024]

It would not be part of the CPU as 10ns is a lot slower than the access time of the SRAM that is on die for L1/L2/L3 chaches. It is in the same ball park as the DRAM and LPDDR memory used for main memory though.

DDR 1600 CL7 memory has an access time of 8.75ns, which is only "a bit" faster than the 10ns that this stuff supposedly can handle. That is the equivelent to CL8 memory at DDR1600 (which has an access time of 10ns).

This does not take in to account the actual round trip time from the CPU to main memory, which is part of the reason why CL7 really doesn't translate to significantly higher performance than CL9 memory does, even though the access time is about 25% faster. On a Sandbridge processor there is a latency of about 150 clock cycles to retrieve data from main memory. At 3.3Ghz that translates to about 45ns of built in lag (not sure if that takes in to account the actual memory access time as part of the latency or not). So the memory chip latency accounts for at most 18% of the overall latency and possibly as little as 14%, so even a "big" change in main memory chip access times only changes overall main memory latency a small amount (25% of 14% leads to a 4% change in memory latency).

L1 cache speed is roughly .5ns and L2 is roughly 7ns AFAIK that takes in to account the clock cycles, with L1 cache is 2 clock cycles on SB and I think L2 is around 10-15 clock cycles (L3 I think is around 30-40 clock cycles). So as you can see, the memory access time is ridiculously low, well below a nanosecond for L1 cache. So if you use slower access memory on the CPU die, you are going to severly limit processor speed. You want the gosh darned fastest switching transistors you can manage on them (even for L3).