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Old 19th Jun 2012, 10:33   #1
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Intel unveils Xeon Phi MIC hardware

Intel has announced plans to launch the Larrabee-based MIC hardware as the Xeon Phi.
http://www.bit-tech.net/news/hardwar...ils-xeon-phi/1
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Old 19th Jun 2012, 11:31   #2
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They may have ended up aiming at core count being a power of two. Until they say precisely, though, it's all guesswork.

I'm actually really curious about this; much is going to depend on performance per Watt, as even the HPC sector is getting energy conscious.
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Old 19th Jun 2012, 13:54   #3
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Not that these boards will ever be affordable by common man... but how long until a company like Lucid writes an app that siphons the massive computing power of these boards through onboard graphics?

There is just no arguing, twice the computing power has got to produce something good in the world of rendering.
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Old 19th Jun 2012, 15:01   #4
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I saw somewhere but cannot remember where, but it said these thing's had around 100 cores based on the old Pentium 4.

I wonder if these would be able to be used for F@H giving you a massive increase in PPD possibly.
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Old 19th Jun 2012, 15:24   #5
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Originally Posted by damien c View Post
I saw somewhere but cannot remember where, but it said these thing's had around 100 cores based on the old Pentium 4.
Wherever you read it, it was wrong: they're fifty-some core cards, and have nothing to do with the old Pentium 4 architecture whatsoever.
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I wonder if these would be able to be used for F@H giving you a massive increase in PPD possibly.
That's exactly the kind of task Intel is aiming the Xeon Phi at: massively parallel processing in supercomputing and HPC. You *could* get a massive increase in PPD, but the boards are going to be seriously expensive and you'd need to modify the F@H code to specifically use the MIC architecture. Not that that's a real problem: when I spoke to Intel about MIC (based on what was then called Knights Ferry) at ISC last year, Kirk Skaugen claimed it had taken the university of forgottenwhere a week to modify their software to be MIC-ready.
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Old 19th Jun 2012, 15:38   #6
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i'm still unclear about these - is this actually a gpgpu like tesla or is it actually additional cpu cores? also, i feel like something like this would likely be faster than the main CPU of the system and therefore find it hard to believe that it can perform to its maximum potential from a pci-e slot. also, it is atom based again or xeon this time?
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Old 19th Jun 2012, 15:43   #7
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i'm still unclear about these - is this actually a gpgpu like tesla or is it actually additional cpu cores?
Six of one, half a dozen of the other. The cores have more in common with a GPU than a CPU - they're based on the Larrabee architecture - but there's no graphics handling capabilities. They're designed for massively-parallel processing and floating-point performance, but they don't show up as CPUs to the system - you can't run your OS on them.
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also, i feel like something like this would likely be faster than the main CPU of the system and therefore find it hard to believe that it can perform to its maximum potential from a pci-e slot.
Remember it's got a chunk (8GB or more) of its own RAM, and Intel's making noises about InfiniBand backplanes (something Knights Ferry and Corner, which were PCIe exclusively, didn't feature.) Remember too that a GPU is technically 'faster' than the main CPU of a system at certain tasks - otherwise we wouldn't have GPUs...
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also, it is atom based again or xeon this time?
Neither, it's MIC.
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Old 19th Jun 2012, 15:55   #8
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Wasn't Larrabee based on X86? So is this still X86 with added instruction sets or a completely different set?
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Old 19th Jun 2012, 16:00   #9
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Wasn't Larrabee based on X86? So is this still X86 with added instruction sets or a completely different set?
That's one of Intel's biggest selling points: unlike rival floating-point accelerator boards, such as GPGPUs and boards like Adapteva's Epiphany, the MIC boards are largely x86 - making them easy to code for. Unfortunately, they're special enough that code still has to be rewritten - but not as much as migrating the code to a non-x86 platform.
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Old 19th Jun 2012, 16:21   #10
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That's one of Intel's biggest selling points: unlike rival floating-point accelerator boards, such as GPGPUs and boards like Adapteva's Epiphany, the MIC boards are largely x86 - making them easy to code for. Unfortunately, they're special enough that code still has to be rewritten - but not as much as migrating the code to a non-x86 platform.

Ahh, thanks for that On the f@h front, you're not allowed to alter any of the code within the client, only the Stanford team are allowed. But if someone persuaded them to do it, and some other nice people with lots of money bought a couple of these, the output would be phenominal.
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Old 19th Jun 2012, 17:10   #11
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I have a couple of these on my future shopping list, for folding with (but not before Stanford update their code to support it). Should be a lot of ppd with these cards
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Old 19th Jun 2012, 22:43   #12
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Wasn't Larrabee based on X86? So is this still X86 with added instruction sets or a completely different set?
That's one of Intel's biggest selling points: unlike rival floating-point accelerator boards, such as GPGPUs and boards like Adapteva's Epiphany, the MIC boards are largely x86 - making them easy to code for. Unfortunately, they're special enough that code still has to be rewritten - but not as much as migrating the code to a non-x86 platform.
How does that work ? If they don't implement the entire x86 instruction set, the programs need to be recompiled to run on those cores anyway. If programs have to be recompiled, it doesn't matter whether those cores s'speak' any x86 at all - afterall x86 isn't well-known for being an efficient architecture or anything, it's a bloaty kludge on kludge kind of thing, so anything built from the ground up would provide better results ... and if you're recompiling anyway, why not recompile for the BEST solution ?
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Old 19th Jun 2012, 22:44   #13
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Wasn't Larrabee based on X86? So is this still X86 with added instruction sets or a completely different set?
That's one of Intel's biggest selling points: unlike rival floating-point accelerator boards, such as GPGPUs and boards like Adapteva's Epiphany, the MIC boards are largely x86 - making them easy to code for. Unfortunately, they're special enough that code still has to be rewritten - but not as much as migrating the code to a non-x86 platform.
How does that work ? If they don't implement the entire x86 instruction set, the programs need to be recompiled to run on those cores anyway. If programs have to be recompiled, it doesn't matter whether those cores 'speak' any x86 at all - afterall x86 isn't well-known for being an efficient architecture or anything, it's a bloaty kludge on another kludge kind of thing, so anything built from the ground up would provide better results ... and if you're recompiling anyway, why not recompile for the BEST solution ?
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Old 20th Jun 2012, 04:34   #14
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How does that work ? If they don't implement the entire x86 instruction set, the programs need to be recompiled to run on those cores anyway. If programs have to be recompiled, it doesn't matter whether those cores s'speak' any x86 at all - afterall x86 isn't well-known for being an efficient architecture or anything, it's a bloaty kludge on kludge kind of thing, so anything built from the ground up would provide better results ... and if you're recompiling anyway, why not recompile for the BEST solution ?
Because, as Gareth pointed out, most of the instruction set is the same only requiring relatively minor tweaks to make it work. Building from the ground up would take so much longer and loads more man hours to get anything to work with it. There's a reason x86 is still the predominant instruction set.
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