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CPU Intel design flaw?

Discussion in 'Hardware' started by adidan, 2 Jan 2018.

  1. adidan

    adidan Guesswork is still work

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    * pleased face * Major headache for many people who use their pcs for things other than gaming though.

    I would be interested to see the effects the patch will have on comparative performance between Intel and AMD over the past few, well many, years. Whether anybody can be bothered to look at it is another matter :)
     
  2. Corky42

    Corky42 Where's walle?

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    Someone explained to me that may not be the case with Windows as Linux already ran drivers in user space whereas with Windows the Kernel User space switching of graphics drivers is less clear, IDK how accurate that is or how much difference there is between the way Linux and Windows deal with drivers.
     
  3. MLyons

    MLyons 70% Dev, 30% Doge. DevDoge. Software Dev @ Corsair Lover of bit-tech Administrator Super Moderator Moderator

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    Fair point. If it does make framerates drop in games it could shake up the industry quite a bit. I may have to test some stuff downstairs or at home.

    Tempted to poke matt and ask him to do this. So far it seems only things like handbrake will be changed but with AMD finally going blow for blow with intel in productivity stuff and even beating them this may be what they need.
     
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  4. Vault-Tec

    Vault-Tec Green Plastic Watering Can

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    https://patchwork.kernel.org/patch/10133447/

    AMD processors are not subject to the types of attacks that the kernel
    page table isolation feature protects against. The AMD microarchitecture
    does not allow memory references, including speculative references, that
    access higher privileged data when running in a lesser privileged mode
    when that access would result in a page fault.

    Disable page table isolation by default on AMD processors by not setting
    the X86_BUG_CPU_INSECURE feature, which controls whether X86_FEATURE_PTI
    is set.
    Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
    ---
     
  5. Gareth Halfacree

    Gareth Halfacree WIIGII! Lover of bit-tech Administrator Super Moderator Moderator

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  6. Vault-Tec

    Vault-Tec Green Plastic Watering Can

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    Oops sorry mate didn't see it. I don't know why, but B-T articles are kinda small, even on my gargantuan monitor lol. They are centred and quite small.
     
  7. MLyons

    MLyons 70% Dev, 30% Doge. DevDoge. Software Dev @ Corsair Lover of bit-tech Administrator Super Moderator Moderator

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    Don't get me started on this :blah:. I just zoom in.
     
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  8. Vault-Tec

    Vault-Tec Green Plastic Watering Can

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    Well I can pinch on my Macbook which is pretty good :)
     
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  9. adidan

    adidan Guesswork is still work

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    Perfect size on a phone though :)
     
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  10. javaman

    javaman May irritate Eyes

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    So why couldn't this be fixed with microcode on the processor level rather than an OS level fix?
     
  11. adidan

    adidan Guesswork is still work

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    Someone explain to a halfwit like myself, why are OS publishers picking up the mess Intel have in their design? Is there no other way than patching the problem at the OS level?

    Edit: small screen missing of above post. Well i did say i was a halfwit :)
     
  12. MLyons

    MLyons 70% Dev, 30% Doge. DevDoge. Software Dev @ Corsair Lover of bit-tech Administrator Super Moderator Moderator

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    Intel cba if i had to guess. Most people will give the OSes flack instead of Intel so they don't "need" to do anything. Technical wise not a clue.
     
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  13. adidan

    adidan Guesswork is still work

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    Thanks, maybe i'm a 3/4 wit afterall :)
     
  14. Corky42

    Corky42 Where's walle?

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    From my limited understanding it's because it's a flaw in the microarchitecture of the CPU and isn't something that can be prevented from happening via a change to the software (microcode) running on the CPU, it's a physical design flaw.

    Like i said my understanding is limited but from what i can tell it's to do with the way Intel designed their translation lookaside buffer, a type of buffer that's used by programs to speed up access to information in memory, the memory addresses of the information in the TLB was meant to be isolated and i believe some enterprising soul has discovered they can use what is in essence a copy of a table of memory locations.

    I could have that totally wrong though so don't go quoting me. :)
     
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  15. RedFlames

    RedFlames ...is not a Belgian football team

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    Based on my limited understanding my guess is by the time the instruction has reached the CPU or the part in the process where microcode would have an effect it's too late.

    Microcode is a sign on the bridge saying 'Bridge out'
    OS-level patch is a sign saying 'bridge out, follow diversion' a mile or so before the bridge.
     
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  16. Corky42

    Corky42 Where's walle?

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    Not knowing what I'm talking about IDK how accurate the article i just read is but from what little i do understand it seems to do a good job of explaining what maybe going on with this bug.
     
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  17. adidan

    adidan Guesswork is still work

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    Ah ha thanks Red, I guess that makes sense.

    Following that logic the only other way of tackling it would be to make sure the problem isn't there in the design phase and the horse bolted on that one, what, about 10 years ago?

    Edit: The next thing to know is who knew what when and whether any shares were sold... You know, coincidentally and all that.
     
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  18. bdigital

    bdigital Is re-building his PC again

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  19. adidan

    adidan Guesswork is still work

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    Any chance W7 will get a patch or will that somehow be impossible and it can only be done for W10...?
     
  20. Guest-56605

    Guest-56605 Guest

    It wouldn't surprise me if the answer to that one is no - It's another way for Microsoft to force users to migrate over to 10 after all.
     

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