Hardware How to Make a CPU: From Sand to Shelf

Great article, thanks for collaberating on this one

The above brushes on the most technically challenging and awe inspiring parts for me.

If you get the chance, it might be nice to get a bit more info on this step. Explain immersion lithography + double patterning a bit more, why the chips are sized in 'nodes' (45nm to 32nm etc), wavelength of the lightsource used, technical challenges presented in hitting the 32nm node, whats needed to hit the 22nm node etc etc etc.

 

Also another suggestion, why not get in touch with Kingston/Corsair and see about doing a DRAM one?

 

Stunningly good article. I never realised how intricate a CPU is in terms of design. Sure, I knew it was difficult to make, but MY GOD, I've got a whole new level of respect for CPU designers now.

 

awesome read

 

This was most interesting. Great article BT!

 

I've seen these pictures before, I think...

 

cool article and nice pictures

did you render them yourself?

 

Oversimplified to nonfunctionality for sure, but okay (judging by the reactions) I'd have expected most people here to know this allready

More like the last 30 tbh...look for VLSI in Wikipedia

It's pretty much exactly the same, only without low-K and a lot less interconnects.

Did you read how the first interconnect was made? The copper-in-the-hole-and-polish-till-only-the-filled-copper-pit-is-left? That's really how all layers of interconnect* are made, then repeat, repeat, repeat (30x)

*Except the first one, as no copper should contact the silicon)

Don't know where they got the picture, but this is pretty much the technology of the year 2000 (like first 1Ghz AMD Athlon) Wikipedia interconnect picture

 

I used to work for ST microelectronics in Burn In section as an oven operator, they got to our factory as wafers then they had to be cut if I'm not mistaken by a 20 nanometer circular saw almost like the one in the picture. Fantastic article I didn't know the first stages tough they were made in another factory fantastic stuff that is! (some ''system on chips' I used to test were heated to about 125 celcius for a duration of 12-24 hours with a massive cycle test running heavy dung man!)

 

I didn't understand much of it, but that's due to my limited brain capacity. Nice article.

 

Good job. One thing you should correct however is that the high-k dielectric was first used to make the transition from 65nm to 45nm possible; 32nm is the second generation of the technology. The article implies that it was first used in the transition from 45nm to 32nm, which is incorrect.

 

Well some of us don't.....we don't all make CPUs for a living you know

I thought it was a really nice article and I'm amazed at the precision they are able to achieve at such small scales, though I would have liked it to have gone into a little more depth in places.

One thing I've always wondered is why they make the wafers circular. Since the CPU dies are rectangular this would surely lead to a lot of wasted silicon wouldn't it?

 

30 interconnect layers, are you talking metal layers surely not there yet, I've not yet hit 10, used a number of processes and never seen that much, though I suppose if you include poly layers, vias and RDL etc. its not far off.

article skips over quite a lot of stuff at each step, I guess you can only go so deep or you'll end up writing a few hundred pages

Intel released some papers on their 45nm process that some might find interesting

http://download.intel.com/technology/itj/2008/v12i2/ITJ_v12issue02.pdf

 

So basically CPU is made up of Zillions of transistors connected together?..hmm what about the L1,L2,L3 cache? or the other tiny part of the CPU? all of them are transistors?...
Great information BT!

 

Actually, they do...

Check some google images:
e.g. http://www.syagrussystems.com/images/Wafer-Dicing-2.jpg
The wafer is first "glued" to a membrane so that not all the chips get airborne when cutting them.

 

They wont use saws (lol), they use LASER to cut them.

I loved the explanation, good work.

 

So much water lost on Wafer-Dicing-2.jpg !

 

Thank's for the article, its about the right level for me at least What I find fascinating is the design of the masks, all of the optics involved is crazy.

 

very nice and basic introduction to manufacturing an Intel High-K chip.

it seems to be images coming from Intel, emphasising their High-K gates. it's not usually needed as technology improve, currently, only 45nm or lower needs this type of extra complication. at normal (90nm or above) size, the High-K stages are not needed.

 

I thought t hey used X-ray lithography 'cause X-rays have a smaller wavelength and so can be used to etch smaller details?
Or have I just unwittingly revolutionised chip manufacture by improving their etching method?
There you go, Intel, you can have that!