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News AMD's Ryzen hit by FMA3 hard-crash erratum

Discussion in 'Article Discussion' started by Gareth Halfacree, 16 Mar 2017.

  1. Gareth Halfacree

    Gareth Halfacree WIIGII! Staff Administrator Super Moderator Moderator

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  2. Corky42

    Corky42 What did walle eat for breakfast?

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    From what i was reading it seems related to a power issue as OC'ed Ryzen's don't seem to be effected.
     
  3. dstarr3

    dstarr3 New Member

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    So is this a driver/firmware kind of fix, or would this require replacing the CPU with an updated version?
     
  4. RedFlames

    RedFlames ...is not a Belgian football team

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    iirc it's typically done via bios update. Basically a patch that says 'this function is broken, don't use it'.

    Gareth can probably provide a better explanation that that, but this kinda thing is more common than you'd think. For example Skylake had its own... quirks...
     
  5. Gareth Halfacree

    Gareth Halfacree WIIGII! Staff Administrator Super Moderator Moderator

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    Wot 'e said. Basically, there's a thing called 'microcode' which is, effectively, the thing you're actually talking to when you're sending the CPU instructions. The user says "what's two plus two," the program says "ADD REG1 REG 2; MOV REG3;," the microcode says "right, turn these particular parts of the processor on and have them physically do the following."

    When a processor erratum is found, you update the microcode to fix it. In some cases, like Red says, the 'fix' might involved completely disabling a broken instruction (like when Intel disabled TSX 'cos it turned out you could crash the whole system with it). In other cases, there might be a way to change how the instruction operates and bypass the problem. In still more cases, you might use it to 'fix' something that was never really a bug - Intel took away the ability to overclock supposedly-locked chips via a microcode update just recently.

    HWBOT says that somebody - either AMD itself or a motherboard maker - has said that it's going to be fixed in a microcode update, though it hasn't been specified whether the 'fix' will make FMA3 work properly or just disable it altogether.

    While I'm here, a fun little fact for you: AMD was originally working on implementing FMA3 (fused multiply-add with three operands) while Intel was working on an equivalent instruction called FMA4 (fused multiply-add with four operands). AMD then switched to FMA4 while Intel switched to FMA3. So, the reason it took some dude running a random benchmark to find the flaw is that you wouldn't normally use FMA3 on an AMD chip - you'd use FMA4. The benchmark the guy was using hadn't yet been compiled for Ryzen, though, so he was using a version compiled for Haswell which used the FMA3 instruction and thus triggered the bug. If he'd used a version compiled for Piledriver or Bulldozer, it wouldn't have used FMA3 and we'd have no idea about the flaw.

    Also, just in case it seems like AMD's really dropped the ball on this one, errata are incredibly common in systems as complex as processors. Here's the Skylake spec update from January this year, with a list of unfixed errata which spans 35 pages. For a real eye-opening experience, have a look at how many have "None identified" printed under "Workarounds."
     
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  6. Flexible_Lorry

    Flexible_Lorry Member

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    Thanks Gareth for the follow-up information.
     
  7. Gareth Halfacree

    Gareth Halfacree WIIGII! Staff Administrator Super Moderator Moderator

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    I live to serve.
     

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