There is a limit an atom of silicon is 222pm in diameter for example so it will never get to a pico meter scale. 11nm should be reached in 2022 however below this quantum tunnelling will become a major problem and it is unlikely conventional lithography, etch or even chemical-mechanical polishing processes can continue to be used, because these materials contain a high density of voids or gaps. Even at 11nm the gate size will be 6nm which means there's only 27 atoms between gates and it would also have to be a mono layer of atoms thick which is crazy. Completely new technologies will have to be developed such as non-silicon extensions of CMOS, using group III-V elements or nanotubes/nanowires, as well as non-CMOS platforms, including molecular electronics, spin-based computing, and single-electron devices, have been proposed. Therefore there is going to have to be a move in the next decade or so into nanoelectronics.