News G70: more than 3 clock domains - 'hard to believe'

Discussion in 'Article Discussion' started by Tim S, 8 Jul 2005.

  1. Tim S

    Tim S OG

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  2. The_Pope

    The_Pope Geoff Richards Super Moderator

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    I'm less bothered about what the clockspeed is, and more interested on what the card does. R520 might be 600Mhz, but that's mostly meaningless on its own - it's how fast it is in games.

    IMO it only really serves the purpose of arguing who has the "more efficient" GPU, based on FPS in relation to clockspeed. I'd rather know about FPS per dollar it costs me tbh :)
     
  3. TheAnimus

    TheAnimus Banned

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    so he is saying that the dividor is a PLL controlled one?! i'm confused.

    PLL for thouse out of the know, takes the fact that with most cyrstals there is another phase which is oscilating, 90 degrees ahead. Now you can use that to multiply up the clock speed very acuratly.
     
  4. Da Dego

    Da Dego Brett Thomas

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    So in his statement, Unwinder is essentially saying "more clocks is a load of crap" because if there were more clocks we'd see it in the bios, right? Sounds reasonable enough...

    And thanks, Animus, learned something new! :) How is that more accurate, though, than previous clock methods? My chip design is a little rusty.
     
  5. Tim S

    Tim S OG

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    basically that's what he is saying yes...

    The divider/clock generator is one (or more) PLL programs.
     
  6. Enforcer

    Enforcer What's a Dremel?

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    Hmm the secrets that are held in the G70 are so secret even Nvdia doesnt really know! I do.... :D certainly wish i knew.. LOL i dont care i hate ATI with a passion becuase 1 they suck. 2 someone from ATI released the d3 pre-alpha to the public and they should have been shot for that. NVIDIA ALL THE WAY!!!
     
  7. Fod

    Fod what is the cheesecake?

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    way to end the thread.
     
  8. Froggy

    Froggy What's a Dremel?

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    omgz nvidiaz sux0rz an ati r0x0rz j00r b0x0rz!!11111!!!!!!!1!
    Please just STFU with stupid usless comments. If you have somthing important to say, than say it.
    k, back on topic.
    Animus, thanks for your info, as before your post i was like :confused: wtf are they talking about.
     
  9. Da Dego

    Da Dego Brett Thomas

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    WOW...Ok, I'm sorry...DID ALIENS KIDNAP FROGGY!?!?!?! Who ARE you that keeps posting under his name!?

    Did Roto hit you over the head one too many times and something clicked together or what!?

    I'm so confused... :confused: Happy, but confused.
     
  10. Froggy

    Froggy What's a Dremel?

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    Yea i was looking back at some of my old posts and was like "omgwtf am i talking about?". I realized how n00bish i looked and understood why none of the mods had any respect for me. Those days are all in the past now (i hope). Then RotoSequence somehow got me to possibly want a FX-57, but its weak multitasking abilitys compaired to the P4 is what stopped me from trying to get one. Then he showed me the dual core 4800+ and i wet myself. Im just waiting for ATI to release a performance Crossfire board and im making the jump.
     
  11. Cheap Mod Wannabe

    Cheap Mod Wannabe What's a Dremel?

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    "omgz nvidiaz sux0rz an ati r0x0rz j00r b0x0rz!!11111!!!!!!!1!"

    HA HA HA Man I gotta learn this language.

    Anyways can someone please explain to us illiterate human beings (plural due to my double personality =) what the heck is that article trying to say. How do those multiple clocks make it better?
     
  12. Froggy

    Froggy What's a Dremel?

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    I wrote the dictionary for it. :D
     
  13. Tim S

    Tim S OG

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    If you read yesterday's story: http://www.bit-tech.net/news/2005/07/07/g70_clock_speed/

    David Kirk told us that there we were making an assumption that there was only three clock domains inside G70. However, Unwinder - the guy behind RivaTuner, finds that hard to believe because of what the BIOS tells us. Basically the VGA BIOS report from RivaTuner tells us that there are three clock domains determined by the PLL programs inside the BIOS.

    The BIOS should, by rights, store all of the clock information for the GPU.
     
  14. Da Dego

    Da Dego Brett Thomas

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    Unless they've got a second, smaller BIOS that the first communicates to, of course. But I find that HIGHLY unlikely, being as the definition of a BIOS is that it IS the lowest-level in and out.. :)
     
  15. Tim S

    Tim S OG

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    maybe these additional clock speeds are stored somewhere in the GPU, and not in the BIOS? They may be dependant on the three clock domains that are in the BIOS... who knows.
     
  16. Da Dego

    Da Dego Brett Thomas

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    But then wouldn't they have to be given the current 3 clock speeds BY the BIOS? It would need that to communicate...


    I feel like in church..."Why, father?" "Well, it's a mystery of faith..." :)
     
  17. Tim S

    Tim S OG

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    if the 'unannounced' clock domains can reside from the clocks that are already determined by the BIOS, they do not need the BIOS to generate them, surely? That's my understanding...
     
  18. Fod

    Fod what is the cheesecake?

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    maybe the bios stores three base clock settings and the GPU dynamically alters its clock speeds from those bases. how do CPUs scale their speeds?
     
  19. FILTHY1337

    FILTHY1337 Senior Overclocker

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    Thats just what im thinking, like the K8 kool and quiet times 3.

    so are the three clocks gunna be like Idle(cool and quiet) normal for less intess tasks and turbo for the most demanding games?
     
  20. Tim S

    Tim S OG

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    I don't think that's what NVIDIA are getting at...

    if we look at the flow diagram here: http://www.bit-tech.net/hardware/2005/06/22/g70_architecture/2.html

    There are more than just Geometry, Shader and Rasterizer portions of the GPU...

    Maybe the 'many clocks' are broken down in to the following categories:

    • the Host / FW / VTF has its own clock, which resides from the Geometry clock domain
    • The Cull / Clip / Setup engine and also the Shader Instruction Dispatch clock speeds all reside from the Shader clock domain
    • while the Fragment Crossbar clock speed resides from the Rasterizer (ROP/Pixel Output Engine) clock domain

    Basically, I'm breaking the GPU down in to its various stages and the clocks for the intermittant stages are calculated/generated by the portion of the GPU that they supply to ensure that there is the 'right amount' of throughput for each portion of the GPU when it is required?
     
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