Electronics Generating a clock signal and chip select signal?

Discussion in 'Modding' started by bwgames, 21 Aug 2005.

  1. bwgames

    bwgames Minimodder

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    Hiya,


    As a summer project I'm doing, I've ended up having to drive an ADC and DAC convertor.

    I initially used a PIC to output the serial clock (SCLK)and chip select (CS) signals, but it ran slow,and I mean, seriously slow, so I'm looking at a hardware, shift register (e.g.) method of implementing the signals.

    The SCLK shouldn't be hard to implement, just using an oscillator, or something, along with a divide by 2 system to slow it down if needed, right?
    But its the CS thats giving me grief... I basically need the CS to be idle high, go low at a specified input signal (e.g. from a 'controlling' PIC), and remain low for 15 SCLK cycles, then go high again.

    Anyone got any hints as to what to look at?

    Thanks :D
     
  2. NoMercy

    NoMercy What's a Dremel?

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    The fairly simple method is to take a simple oscilator (74HC04 + crystal, popular in some 1980's computers) and put that into a counter, then using simple logic chips generate the waveform you want from the diferent count outputs, if they arn't already available, though you might need to chain a couple of 4-bit counters together to get upto 8 bits to generate all the lines you need for your pattern if you don't want it to be occuuring right after the first one finishes.
     
  3. bwgames

    bwgames Minimodder

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    Cheers for the useful reply :)
    Got some ideas for the 8bit counter below, are they suitable, or do you have any other parts that might be more suited?


    I've got my eye on the Philips 74HC590 or the Maxim ICM7240/50/60.

    The Maxim 7240 looked the best, but from what I can understand, the maximum cycle is divide by 256, which seems to only be for 7 clock cycles?
    I guess I could use a (e.g.) 10Mhz osc, connected to a divide by 2 counter, which would be connected to the 7240, and have the serial clock to the ADC/DAC in direct from the 10Mhz clock, giving a CS eqvilalent of 15 cycles to the ADC/DAC?

    Thanks :D
     
    Last edited: 22 Aug 2005

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