News Rumours point to AMD Kaveri delay

First! " on-board GDDR5 memory controller". My question is, does that mean that you will be able to put DDR5 modules in your move like we do with DDR3 to combine with the built in gpu of the apu?

EDIT
*does that mean that you will be able to put DDR5 modules in your mobo like we do with DDR3 to combine with the built in gpu of the apu?

 

rumour mill says its GloFO that's the issue - that's if its GloFo making them as TSMC has also been hinted at making them....


which reminds me - why isn't UMC used now?

 

I have to disagree with you here. while GDDR5 suffers from relatively higher access latencies, it can scale to higher frequencies than DDR3, and it offers twice the transfer rate of DDR3 at the same signaling frequency. That not only minimizes the effect of higher latency while providing twice the theoretical throughput, but also offers the advantage of better performance at slightly lower power consumption, which is critical for ultra portable devices...

 

The DDR3 vs GDDR5 argument is tricky. A couple of other issues are:
- much wider interface on GDDR5 would mean DIMMs are pretty hard, so you'd only expect to see it directly soldered to the board
- much larger minimum transaction sizes mean you might have to fetch more data than you can fit in a cacheline, so you lose a lot of power efficiency. It also means the "it's faster which hides the latency" argument doesn't work

 

GDDR5 controllers and ICs are nominally 32bit wide vs 64bit controllers/ICs for DDR3. I didn't quite get the cause/affect relationship from having a wider interlace to "hard" DIMMs.

Minimum transaction size has got nothing to do with the technologies in discussion here. But indeed, I don't think there are I/O instructions for reading or writing a nibble to/from VRAM, which isn't much of a problem as those are rarely used...

Physically, a GDDR5 controller/IC doubles the I/O of DDR3 - With DDR, I/O handles a write I/o, or read I/o but not both on the same cycle. GDDR handles input and output on the same cycle. So in a less synthetic and more practical scenario, the much higher access latencies of GDDR hardly translates to higher read/write latencies..

 

ah, sorry - was thinking of DDR4.

Does GDDR5 need double the IO pins in order to get concurrent read and write?

 

GDDR5 memory controllers can actually split the data lanes, I believe, and read/write from 2 different ICs at the same time. So no increase in the number of Data/address lanes is required.

Now the goal here, as I see it, is feeding an APU, which isn't a CPU. the new APUs will have unified memory between the CPU and the on-chip GPU. This essentially will mean that the GPU will be able to address all the memory space that the CPU can address, which makes bandwidth a much more important factor if the GPU is to be used for processing.

Kaveri will have a GCN or GCN2 radeon logic and a hardware transcoder. GCN is quite good at doing GPGPU. If games start to use the GPU in the APUs to do physics and/or AI processing, AMD's APUs, despite having slower X86 cores, might become a much better option for high end gamers.

384 stream cores in 6 SIMD units can outperform a quad core Intel processor by leaps and bounds in physics simulation benchmarks. Here:

http://media.bestofmicro.com/X/V/365395/original/clbenchmark.png

 

I could be way, way off, but if it's an on-board memory controller, isn't it more likely we'll see something along the lines of boards with soldered-on GDDR5? Intel has a CPU/GPU with onboard GDDR5, if I'm not mistaken, so it doesn't seem out of line that AMD figured out how to do the same...but better, since AMD doesn't feel the same need for artificial market segmentation (or AMD can't afford to take the chance of confusing and enraging their customers as Intel seems to delight in).

Don't like to see AMD missing dates, if this is true, but it don't me no nevermind - sounds like the timing will be about right to build a new PC next summer for my wife. Kaveri for her, Steamroller for me

 

Further points: whether you get desktop GDDR5 modules also depends on JEDEC making a standard and the PCB houses coming up with a design, and whether a module system can take the tracing/speeds. They have trouble enough scaling DDR technology on module systems. There would be news of sampling/test kits at least, and they won't be able to do that in ~8 months. I'll have to ask my friends in the memory industry.

Any GDDR5 systems will therefore have to be integrated: AiO or ready-built SFF PCs for example. Given the cost of large amounts of GDDR5 and very few manufacturers (Samsung/Hynix?), that begs the question, does the market sync with the expected cost?

Another option is Steam box? Android-style consoles - one OS with many manufacturers making their own versions in a highly competitive market. Porting would not be an issue and MS/Sony would have to pay through the nose to have exclusives to secure their platforms.

'Thin' laptops with 'good' graphics, but fixed memory is an option too. I doubt you'll be seeing ultrabook thinness though given AMD's track-record with TDPs.

IIRC UMC doesn't have cutting edge foundary technologies and probably does more niche stuff rather than application processors.

 

hmmm they are at 28nm HK gate last in bulk ; similar to GloFO and TSMC

 

Yea but relationships and contracts make up a big portion of business because it improves efficiency, and the likelihood is they've been working on these projects for years.

No two 28nm HKMG processes are identical either: there's varieties of high performance, low leakage etc with varying degrees of yields/clock scaling etc

 

aye and AMD haven't been with UMC for quite a good few years now

 

Whats classed as cutting edge. Intel is aproaching 14nm last I checked the closest to this was samsung in the 20nm range. Glofo and TSMC are both at 28nm still. UMC does not make these types of chips so is a none player.

 

Depends what the process is aimed at. NAND is different from application processor for example.

TSMC has 22/20 and 16 in development as well, with Finfet at 16 and EUV at 10 iirc.

 

Indeed - I'd be surprised if you could still run those frequencies at 1V if it was on a separate module!

 

yes they do - UMC makes 28nm HK on bulk (and soi) - same as tsmc and glofo. they are making OMAP5 for texas

 

Damn, I'm really waiting to see what these new Kaveri-chips can do compared to the Haswell-chips, especially on the CPU-side.

I want to trash my mATX-system - no need for gaming-PC anymore - and go ultra-small with a full system installed into an Antec ISK 110.
I'm on the fence really of buying a Haswell 4670S (allthough the HD4600 still sucks compared to the A10-6700 iGPU) within the next few month, or waiting for Kaveri.