Discussion in 'Article Discussion' started by Tim S, 17 Apr 2007.
So that's a good few thousand dollars dead right ther.
It's neat and all, but uh.. nothing I can do with that pretty coloured wafer of silicon. I'll get moist when it's in a nicely boxed package with my delivery address on it!
However I am sure there are those who will be replying to the article with one hand only..
One handed people?
Well I get to play with one tomorrow. /note to self, don't wear tight underwear.
/curse you lucky people!
why do they use round wafers? wouldnt it be less wasteful to use square ones?
Its a little bit tricky to grow cuboid ingots...
4-storey MEGA WEDGIE!
care to elaborate? i dont really know anything about cpu manufacturing other than small nm = good
Say what now?
You mean cpu's are grown to order?
Silicon is a crystal, it's grown to a wafer.
k so its basicaly cos they have to rotate the thingy to get a solid crystal, squares are a bit hard to rotate properly like that
yes, it's to do with the way single crystal Silicon is "grown". They use the same technique for the materials used in aircraft engines, as impurities mean a potentially lower melting point in that particular scenario.
Well, blimey. Every day is an education. Is there a theory about that a particular place on a wafer always produces the best dies?
That's kind of like the glass needed for Optical Cable. The more expensive the cable, the closer the glass fibers were to the center of the sheet, or so you'd expect.
Well towards the edges tend to be somewhat worse. Back when my dad was engineering stuff along those lines, I actually tossed in a solution that helped fix their problematic data quite a bit.
There's a little alignment notch at one point along the edge. Err, not point as it's a circle... but you know what I mean. Anyways, as it turns out, the tiny amount of extra surface area you get along the edge because of that can really screw with heat uniformity data. Toss that point (and, more likely than not, the chip that would be built there), and the data gets a surprising amount better.
It's true for the whole edge area (it adds something like 900mm^2), so the edge will cool slightly faster, and as a result might not always have as good of a yield. As dies get smaller though, we can fit more chips per wafer and help counteract this.
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