Discussion in 'Article Discussion' started by Gareth Halfacree, 19 Nov 2015.
For the biggest customers only.
'being tuning their algorithms'
Fun fact: not a single one of those words is spelt incorrectly, and thus the error ("being" instead of "begin") would not be picked up by a spell-checker. (Also, you should have written "spell-check much," as "spell-checker much" makes no sense.)
Comments like that don't impress a single person on here
How does this differ from an existing Altera or Xilinx FPGA plugged into PCI express?
Sounds like it's up to the end users to write their own stuff, which is no different to above setup.
Much, much, *much* faster communication with the CPU - and that's assuming Intel doesn't allow the FPGA to share cache with the CPU, which makes things even quicker. Massive difference betwix that and an add-in card.
I beg to differ! It was impressive, although perhaps not in the way the poster intended.
ah, okay. So Intel is selling Intel CPU with a re-programmable co-processor. OR selling a FPGA with an Intel core.
May be further down the line, in addition to Nios and ARM cores, we can get a barebone Intel IP core.
PCI-Express latency overhead is actually pretty high and has limited bandwidth compared to alternatives like NVLink/Omnipath etc.
Separate names with a comma.