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News Micron announces performance-boosted DDR3

Discussion in 'Article Discussion' started by Gareth Halfacree, 18 Dec 2013.

  1. Gareth Halfacree

    Gareth Halfacree WIIGII! Staff Administrator Super Moderator Moderator

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  2. exceededgoku

    exceededgoku New Member

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    so we have 105ns for current implementatios and this brings that down to 90ns...

    Is that really solved, or mitigated?

    In my eyes a solution would be 30ns for the whole operation.
     
  3. Anfield

    Anfield Well-Known Member

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    Initially it won't be available in consumer products.
    In 2014 Cpus will start to support DDR4.

    So will we ever really get any benefit from this expected at some point in the future improvement for DDR3?
     
  4. SAimNE

    SAimNE New Member

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    anyone who's planning on running kaveri will welcome this improvement.... tho i cant imagine they wouldnt want to wait until ddr4 arrives.
     
  5. Gareth Halfacree

    Gareth Halfacree WIIGII! Staff Administrator Super Moderator Moderator

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    And 0ns would be even better. Impossible, but better. Micron isn't saying it's got rid of {param}FAW - that's not possible with DDR, it's part of the way it works; what Micron is saying is that it has solved a timing challenge which has previously prevented it, and other DRAM makers, from reducing the {param}FAW window.
    The same improvement can be used with DDR4, and DDR5, and DDR6... Basically, {param}FAW is common to all DRAM. Improving the {param}FAW cycle means improving all DDR, whether it's the original DDR standard or next-next-next-generation DDR6. It just so happens that Micron is only producing DDR3 using the faster {param}FAW cycle at present, 'cos that's all its customers want. Should Broadcom's next NPU want DDR4, then Micron will make DDR4 with the same reduced-length {param}FAW cycle.
     
  6. exceededgoku

    exceededgoku New Member

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    Thanks for the post Gareth, good news then I guess :).
     
  7. azazel1024

    azazel1024 New Member

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    A key point here is that for networking gear and servers, this isn't simply an improvement in possible bandwidth/through put, this is a reduction in latency, which is a good thing.

    I can also see how it could be of benefit to regular consumer computing too, though at least from what I have seen of various tests, there aren't a whole lot of operations that are particularly latency dependent in the consumer sphere. I would think something like iGPUs this could benefit a lot, though there it seems more bandwidth than latency sensitive too.
     
  8. Cthippo

    Cthippo Can't mod my way out of a paper bag

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    What is that character before the F in FAW?
     
  9. Gareth Halfacree

    Gareth Halfacree WIIGII! Staff Administrator Super Moderator Moderator

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    An italicised, superscript lower-case t: {param}. Used to signify time as a variable.
     
  10. play_boy_2000

    play_boy_2000 It was funny when I was 12

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    The Broadcom's BCM88030 was announced ages ago... is this just a latency reduction for the chip?
     
  11. Gareth Halfacree

    Gareth Halfacree WIIGII! Staff Administrator Super Moderator Moderator

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    This is a latency reduction in Micron's DDR3 modules, at Broadcom's request and for use with the BCM88030 and other NPUs.
     

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