News Micron unveils new parallel computing architecture

Discussion in 'Article Discussion' started by Gareth Halfacree, 19 Nov 2013.

  1. Gareth Halfacree

    Gareth Halfacree WIIGII! Staff Administrator Super Moderator Moderator

    Joined:
    4 Dec 2007
    Posts:
    9,420
    Likes Received:
    307
  2. GuilleAcoustic

    GuilleAcoustic Ook ? Ook !

    Joined:
    26 Nov 2010
    Posts:
    3,277
    Likes Received:
    71
    Neeeeeeeeeeeed ! Do waaaaaaaaaaaaaaaaaant ! Do need price (will probably cry). Funnily enough, I've been reading about a ray-tracing co-processor card yesterday : https://store.caustic.com/caustic-r2500

    [​IMG]

    This is awesome and would save enormous space in a workstation. I'm affraid about the price though, but I could be surprised as the R2500 ray-tracing accelearator is not expensive ($1000, and comes with an SDK).

    I see more and more co-processor being announced / released, this is very exciting and maybe a little of the current boredom will fade away :D

    Edit: This also reminds me of this FPGA expansion board

    [​IMG]
     
    Last edited: 19 Nov 2013
  3. Gareth Halfacree

    Gareth Halfacree WIIGII! Staff Administrator Super Moderator Moderator

    Joined:
    4 Dec 2007
    Posts:
    9,420
    Likes Received:
    307
    Oh, the Caustic? I interviewed Imagination's David Harold about SoC GPUs for that Custom PC feature a while back, and we got onto the subject of the Caustic. Fun fact: the company is doing its damndest to get the technology down to the point where you can do real-time high-resolution ray-tracing in a mobile phone. And it's not pie-in-the-sky, either: we're talking within the next five years.

    And while this is completely the wrong place for it, given it's totally off-topic, here's the interview snippet in question - the bulk of which was never published.
    A little insight into how transcribed interviews read *before* the editing process there!

    On-topic: I'm super-excited about the current push back into co-processors. For some reason, GPGPU leaves me fairly cold - but some of the tile-based stuff coming from the like of Tilera and Adapteva, plus Micron's regex-accelerator... Interesting times ahead!
    I would be very surprised if the suspiciously marking-free chip in the middle of Micron's prototype PCIe board wasn't an FPGA. The final product, however, will be literally just a bunch of Automata Processors slapped on a DDR3-shape DIMM with a dedicated Automata controller built into the motherboard and no FPGA in sight.
     
  4. GuilleAcoustic

    GuilleAcoustic Ook ? Ook !

    Joined:
    26 Nov 2010
    Posts:
    3,277
    Likes Received:
    71
    Thanks for this interview, this is very informative. I'm also very excited about the possible future of computing.

    Back on the FPGA, they are almost everywhere when you need prototyping. It's very convenient but also very expensive when you need huge amount of transistor and blocks. Adapteva use an FPGA built inside the ARM SOC to interface with the parallella 16 cores co-processor. Each Parallella co-processor can then connect itself to another parallella co-processor to expand the array.

    [​IMG]

    I've been thinking about using them in my Amiga revival project, especially the one you can reprogram on the fly. I thought that the idea of a morphable co-processor was great (zip optimized copro, then ray-tracing optimized copro, etc.), but pricing is the real brake there. If you want something powerfull, it costs several thousands of dollars per FPGA, but this is far less than having to create a die for each prototype :D
     
    Last edited: 19 Nov 2013
  5. Gareth Halfacree

    Gareth Halfacree WIIGII! Staff Administrator Super Moderator Moderator

    Joined:
    4 Dec 2007
    Posts:
    9,420
    Likes Received:
    307
    Aye - I've interviewed Adapteva's founder Andreas Olofsson several times over the years, including once just prior to the Parallella's launch. It's not a new move, though: back before FPGAs were a thing the big bear technology was Uncommitted Logic Arrays, or ULAs. The ULA was a pre-designed chip which could then be masked off in a variety of different ways to make it do different things. The result wasn't as small or as a quick as a true ASIC, but it was significantly cheaper and a lot smaller than the old method of using various individual components. A move to a Ferranti ULA was directly responsible for the shrinking of the number of chips found in Sinclair's microcomputers, in fact: the ZX80 had 21 individual integrated circuits, while the most common form of ZX81 - released just one year later - had but four.

    Sadly, there was a consequence: the Ferranti ULA was designed to run only around half of its logic gates in any given design; to make the ZX81 do what it needed to do and yet still hit the street for under £70 (or under £50 if you bought the do-it-yourself kit version) Sinclair ended up running it at closer to 75-80% utilisation. As a result, the chips got hot and died early - the most common reason, alongside a crumbled ribbon cable for the keyboard, for a ZX81 to break.
     
  6. mi1ez

    mi1ez Active Member

    Joined:
    11 Jun 2009
    Posts:
    1,374
    Likes Received:
    12
    So, is this sort of like a dynamically changing ASIC or am I completely misunderstanding?
     
  7. edzieba

    edzieba Virtual Realist

    Joined:
    14 Jan 2009
    Posts:
    2,043
    Likes Received:
    52
    Sounds like it might give custom ASICs for Bitcoin mining a run for their money. At least in terms of actually being able to buy one.
     

Share This Page